\initial {#}
\entry {\code {#}}{16}
\entry {\code {#APP}}{15}
\entry {\code {#NO_APP}}{15}
\initial {$}
\entry {\code {$} in symbol names}{62, 66, 72, 103}
\initial {-}
\entry {\code {--}}{7}
\entry {\samp {--base-size-default-16}}{91}
\entry {\samp {--base-size-default-32}}{91}
\entry {\samp {--bitwise-or} option, M680x0}{91}
\entry {\samp {--disp-size-default-16}}{91}
\entry {\samp {--disp-size-default-32}}{91}
\entry {\code {--enforce-aligned-data}}{105}
\entry {\code {\samp {--fatal-warnings}}}{13}
\entry {\code {--MD}}{12}
\entry {\code {\samp {--no-warn}}}{13}
\entry {\samp {--register-prefix-optional} option, M680x0}{91}
\entry {\code {--statistics}}{13}
\entry {\code {--traditional-format}}{13}
\entry {\code {\samp {--warn}}}{13}
\entry {\samp {-+} option, VAX/VMS}{110}
\entry {\samp {-1} option, VAX/VMS}{110}
\entry {\code {-a}}{9}
\entry {\code {-A} options, i960}{87}
\entry {\code {-ac}}{9}
\entry {\code {-ad}}{9}
\entry {\code {-ah}}{9}
\entry {\code {-al}}{9}
\entry {\code {-an}}{9}
\entry {\code {-as}}{9}
\entry {\code {-Asparclet}}{105}
\entry {\code {-Asparclite}}{105}
\entry {\code {-Av6}}{105}
\entry {\code {-Av8}}{105}
\entry {\code {-Av9}}{105}
\entry {\code {-Av9a}}{105}
\entry {\code {-b} option, i960}{87}
\entry {\code {-D}}{9}
\entry {\code {-D}, ignored on VAX}{109}
\entry {\code {-d}, VAX option}{109}
\entry {\code {-EB} command line option, ARM}{57}
\entry {\code {-EB} option (MIPS)}{98}
\entry {\code {-EL} command line option, ARM}{57}
\entry {\code {-EL} option (MIPS)}{98}
\entry {\code {-f}}{9}
\entry {\code {-G} option (MIPS)}{98}
\entry {\samp {-h} option, VAX/VMS}{109}
\entry {\samp {-H} option, VAX/VMS}{110}
\entry {\code {-I \var {path}}}{10}
\entry {\code {-J}, ignored on VAX}{109}
\entry {\code {-K}}{10}
\entry {\code {-k} command line option, ARM}{57}
\entry {\code {-L}}{10}
\entry {\samp {-l} option, M680x0}{91}
\entry {\code {-M}}{10}
\entry {\samp {-m68000} and related options}{91}
\entry {\code {-mall} command line option, ARM}{57}
\entry {\code {-mapcs} command line option, ARM}{57}
\entry {\code {-mapcs-float} command line option, ARM}{57}
\entry {\code {-mapcs-reentrant} command line option, ARM}{57}
\entry {\code {-marm} command line option, ARM}{57}
\entry {\code {-marmv} command line option, ARM}{57}
\entry {\code {-mbig-endian} option (ARC)}{54}
\entry {\code {-mfpa} command line option, ARM}{57}
\entry {\code {-mfpe-old} command line option, ARM}{57}
\entry {\code {-mlittle-endian} option (ARC)}{54}
\entry {\code {-mno-fpu} command line option, ARM}{57}
\entry {\code {-moabi} command line option, ARM}{57}
\entry {\code {-mthumb} command line option, ARM}{57}
\entry {\code {-mthumb-interwork} command line option, ARM}{57}
\entry {\code {-mv850} command line option, V850}{113}
\entry {\code {-mv850any} command line option, V850}{113}
\entry {\code {-mv850e} command line option, V850}{113}
\entry {\code {-no-relax} option, i960}{88}
\entry {\code {-nocpp} ignored (MIPS)}{99}
\entry {\code {-o}}{12}
\entry {\code {-R}}{12}
\entry {\code {-S}, ignored on VAX}{109}
\entry {\code {-t}, ignored on VAX}{109}
\entry {\code {-T}, ignored on VAX}{109}
\entry {\code {-v}}{13}
\entry {\code {-V}, redundant on VAX}{109}
\entry {\code {-version}}{13}
\entry {\code {\samp {-W}}}{13}
\entry {\code {-wsigned_overflow} command line option, V850}{113}
\entry {\code {-wunsigned_overflow} command line option, V850}{113}
\initial {.}
\entry {\code {.} (symbol)}{28}
\entry {\code {\code {.insn}}}{100}
\entry {\code {.ltorg} directive, ARM}{59}
\entry {\code {.o}}{8}
\entry {\code {.param} on HPPA}{75}
\entry {\code {.pool} directive, ARM}{59}
\entry {\code {\code {.set autoextend}}}{100}
\entry {\code {\code {.set mips\var {n}}}}{100}
\entry {\code {\code {.set noautoextend}}}{100}
\entry {\code {\code {.set pop}}}{101}
\entry {\code {\code {.set push}}}{101}
\entry {\code {.v850} directive, V850}{116}
\entry {\code {.v850e} directive, V850}{116}
\initial {:}
\entry {\code {:} (label)}{17}
\initial {@}
\entry {@word modifier, D10V}{64}
\initial {{\tt\indexbackslash }}
\entry {\code {{\tt\rawbackslashxx }"} (doublequote character)}{18}
\entry {\code {{\tt\rawbackslashxx }{\tt\rawbackslashxx }} (\samp {{\tt\rawbackslashxx }} character)}{18}
\entry {\code {{\tt\rawbackslashxx }b} (backspace character)}{17}
\entry {\code {{\tt\rawbackslashxx }\var {ddd}} (octal character code)}{18}
\entry {\code {{\tt\rawbackslashxx }f} (formfeed character)}{18}
\entry {\code {{\tt\rawbackslashxx }n} (newline character)}{18}
\entry {\code {{\tt\rawbackslashxx }r} (carriage return character)}{18}
\entry {\code {{\tt\rawbackslashxx }t} (tab)}{18}
\entry {\code {{\tt\rawbackslashxx }\var {xd...}} (hex character code)}{18}
\initial {1}
\entry {16-bit code, i386}{85}
\initial {2}
\entry {29K support}{55}
\initial {3}
\entry {3DNow!, i386}{85}
\initial {A}
\entry {\code {a.out}}{8}
\entry {\code {a.out} symbol attributes}{29}
\entry {\code {abort} directive}{33}
\entry {\code {ABORT} directive}{33}
\entry {absolute section}{22}
\entry {addition, permitted arguments}{32}
\entry {addresses}{31}
\entry {addresses, format of}{22}
\entry {addressing modes, D10V}{63}
\entry {addressing modes, D30V}{68}
\entry {addressing modes, H8/300}{69}
\entry {addressing modes, H8/500}{72}
\entry {addressing modes, M680x0}{93}
\entry {addressing modes, SH}{103}
\entry {addressing modes, Z8000}{107}
\entry {\code {ADR reg,<label>} pseudo op, ARM}{59}
\entry {\code {ADRL reg,<label>} pseudo op, ARM}{59}
\entry {advancing location counter}{44}
\entry {\code {align} directive}{33}
\entry {\code {align} directive, ARM}{58}
\entry {\code {align} directive, SPARC}{106}
\entry {altered difference tables}{52}
\entry {alternate syntax for the 680x0}{94}
\entry {AMD 29K floating point (\sc {ieee})}{55}
\entry {AMD 29K identifiers}{55}
\entry {AMD 29K line comment character}{55}
\entry {AMD 29K machine directives}{56}
\entry {AMD 29K macros}{55}
\entry {AMD 29K opcodes}{56}
\entry {AMD 29K options (none)}{55}
\entry {AMD 29K protected registers}{55}
\entry {AMD 29K register names}{55}
\entry {AMD 29K special purpose registers}{55}
\entry {AMD 29K support}{55}
\entry {ARC architectures}{54}
\entry {ARC big-endian output}{54}
\entry {ARC endianness}{3}
\entry {ARC floating point (\sc {ieee})}{54}
\entry {ARC little-endian output}{54}
\entry {ARC machine directives}{54}
\entry {ARC options}{54}
\entry {ARC support}{54}
\entry {architecture options, i960}{87}
\entry {architecture options, M680x0}{91}
\entry {architectures, ARC}{54}
\entry {architectures, SPARC}{105}
\entry {arguments for addition}{32}
\entry {arguments for subtraction}{32}
\entry {arguments in expressions}{31}
\entry {arithmetic functions}{31}
\entry {arithmetic operands}{31}
\entry {\code {arm} directive, ARM}{58}
\entry {ARM floating point (\sc {ieee})}{58}
\entry {ARM identifiers}{58}
\entry {ARM immediate character}{58}
\entry {ARM line comment character}{58}
\entry {ARM line separator}{58}
\entry {ARM machine directives}{58}
\entry {ARM opcodes}{59}
\entry {ARM options (none)}{57}
\entry {ARM register names}{58}
\entry {ARM support}{57}
\entry {\code {ascii} directive}{34}
\entry {\code {asciz} directive}{34}
\entry {assembler bugs, reporting}{119}
\entry {assembler crash}{119}
\entry {assembler internal logic error}{23}
\entry {assembler version}{13}
\entry {assembler, and linker}{21}
\entry {assembly listings, enabling}{9}
\entry {assigning values to symbols}{27, 36}
\entry {attributes, symbol}{28}
\entry {auxiliary attributes, COFF symbols}{29}
\entry {auxiliary symbol information, COFF}{35}
\entry {\code {Av7}}{105}
\initial {B}
\entry {backslash (\code {{\tt\rawbackslashxx }{\tt\rawbackslashxx }})}{18}
\entry {backspace (\code {{\tt\rawbackslashxx }b})}{17}
\entry {\code {balign} directive}{34}
\entry {\code {balignl} directive}{34}
\entry {\code {balignw} directive}{34}
\entry {big endian output, ARC}{3}
\entry {big endian output, MIPS}{5}
\entry {big endian output, PJ}{4}
\entry {big-endian output, ARC}{54}
\entry {big-endian output, MIPS}{98}
\entry {bignums}{19}
\entry {binary integers}{19}
\entry {bitfields, not supported on VAX}{113}
\entry {\code {block}}{108}
\entry {\code {block} directive, AMD 29K}{56}
\entry {branch improvement, M680x0}{95}
\entry {branch improvement, VAX}{111}
\entry {branch recording, i960}{87}
\entry {branch statistics table, i960}{87}
\entry {\code {bss} directive, i960}{88}
\entry {bss section}{22, 24}
\entry {bug criteria}{119}
\entry {bug reports}{119}
\entry {bugs in assembler}{119}
\entry {bus lock prefixes, i386}{83}
\entry {\code {bval}}{108}
\entry {\code {byte} directive}{34}
\initial {C}
\entry {call instructions, i386}{82}
\entry {\code {callj}, i960 pseudo-opcode}{89}
\entry {carriage return (\code {{\tt\rawbackslashxx }r})}{18}
\entry {character constants}{17}
\entry {character escape codes}{17}
\entry {character, single}{18}
\entry {characters used in symbols}{16}
\entry {\code {code} directive, ARM}{58}
\entry {\code {code16} directive, i386}{85}
\entry {\code {code16gcc} directive, i386}{85}
\entry {\code {code32} directive, i386}{85}
\entry {COFF auxiliary symbol information}{35}
\entry {COFF structure debugging}{50}
\entry {COFF symbol attributes}{29}
\entry {COFF symbol descriptor}{35}
\entry {COFF symbol storage class}{46}
\entry {COFF symbol type}{51}
\entry {COFF symbols, debugging}{35}
\entry {COFF value attribute}{51}
\entry {COMDAT}{42}
\entry {\code {comm} directive}{35}
\entry {command line conventions}{7}
\entry {command line options, V850}{113}
\entry {command-line options ignored, VAX}{109}
\entry {comments}{15}
\entry {comments, M680x0}{97}
\entry {comments, removed by preprocessor}{15}
\entry {\code {common} directive, SPARC}{106}
\entry {common sections}{42}
\entry {common variable storage}{24}
\entry {compare and jump expansions, i960}{89}
\entry {compare/branch instructions, i960}{89}
\entry {conditional assembly}{39}
\entry {constant, single character}{18}
\entry {constants}{17}
\entry {constants, bignum}{19}
\entry {constants, character}{17}
\entry {constants, converted by preprocessor}{15}
\entry {constants, floating point}{19}
\entry {constants, integer}{19}
\entry {constants, number}{18}
\entry {constants, string}{17}
\entry {conversion instructions, i386}{82}
\entry {coprocessor wait, i386}{83}
\entry {\code {cpu} directive, SPARC}{54}
\entry {\code {cputype} directive, AMD 29K}{56}
\entry {crash of assembler}{119}
\entry {\code {ctbp} register, V850}{116}
\entry {\code {ctoff} pseudo-op, V850}{118}
\entry {\code {ctpc} register, V850}{116}
\entry {\code {ctpsw} register, V850}{116}
\entry {current address}{28}
\entry {current address, advancing}{44}
\initial {D}
\entry {D10V @word modifier}{64}
\entry {D10V addressing modes}{63}
\entry {D10V floating point}{64}
\entry {D10V line comment character}{62}
\entry {D10V opcode summary}{64}
\entry {D10V optimization}{3}
\entry {D10V options}{61}
\entry {D10V registers}{62}
\entry {D10V size modifiers}{61}
\entry {D10V sub-instruction ordering}{62}
\entry {D10V sub-instructions}{61}
\entry {D10V support}{61}
\entry {D10V syntax}{61}
\entry {D30V addressing modes}{68}
\entry {D30V floating point}{68}
\entry {D30V Guarded Execution}{67}
\entry {D30V line comment character}{66}
\entry {D30V nops}{3}
\entry {D30V nops after 32-bit multiply}{4}
\entry {D30V opcode summary}{68}
\entry {D30V optimization}{3}
\entry {D30V options}{65}
\entry {D30V registers}{67}
\entry {D30V size modifiers}{65}
\entry {D30V sub-instruction ordering}{66}
\entry {D30V sub-instructions}{65}
\entry {D30V support}{65}
\entry {D30V syntax}{65}
\entry {data alignment on SPARC}{105}
\entry {data and text sections, joining}{12}
\entry {\code {data} directive}{35}
\entry {data section}{22}
\entry {\code {data1} directive, M680x0}{95}
\entry {\code {data2} directive, M680x0}{95}
\entry {\code {dbpc} register, V850}{116}
\entry {\code {dbpsw} register, V850}{116}
\entry {debuggers, and symbol order}{27}
\entry {debugging COFF symbols}{35}
\entry {decimal integers}{19}
\entry {\code {def} directive}{35}
\entry {dependency tracking}{12}
\entry {deprecated directives}{52}
\entry {\code {desc} directive}{35}
\entry {descriptor, of \code {a.out} symbol}{29}
\entry {\code {dfloat} directive, VAX}{110}
\entry {difference tables altered}{52}
\entry {difference tables, warning}{10}
\entry {\code {dim} directive}{35}
\entry {directives and instructions}{17}
\entry {directives, M680x0}{95}
\entry {directives, machine independent}{33}
\entry {directives, Z8000}{108}
\entry {displacement sizing character, VAX}{112}
\entry {dot (symbol)}{28}
\entry {\code {double} directive}{36}
\entry {\code {double} directive, i386}{84}
\entry {\code {double} directive, M680x0}{95}
\entry {\code {double} directive, VAX}{110}
\entry {doublequote (\code {{\tt\rawbackslashxx }"})}{18}
\initial {E}
\entry {ECOFF sections}{99}
\entry {\code {ecr} register, V850}{115}
\entry {eight-byte integer}{45}
\entry {\code {eipc} register, V850}{115}
\entry {\code {eipsw} register, V850}{115}
\entry {\code {eject} directive}{36}
\entry {\code {else} directive}{36}
\entry {\code {elseif} directive}{36}
\entry {empty expressions}{31}
\entry {emulation}{5}
\entry {\code {end} directive}{36}
\entry {\code {endef} directive}{36}
\entry {\code {endfunc} directive}{36}
\entry {endianness, ARC}{3}
\entry {endianness, MIPS}{5}
\entry {endianness, PJ}{4}
\entry {\code {endif} directive}{36}
\entry {\code {endm} directive}{43}
\entry {EOF, newline must precede}{16}
\entry {\code {ep} register, V850}{115}
\entry {\code {equ} directive}{36}
\entry {\code {equiv} directive}{37}
\entry {\code {err} directive}{37}
\entry {error messsages}{8}
\entry {error on valid input}{119}
\entry {errors, caused by warnings}{13}
\entry {errors, continuing after}{13}
\entry {ESA/390 floating point (\sc {ieee})}{79}
\entry {ESA/390 support}{78}
\entry {ESA/390 Syntax}{78}
\entry {ESA/390-only directives}{79}
\entry {escape codes, character}{17}
\entry {\code {even}}{108}
\entry {\code {even} directive, M680x0}{95}
\entry {\code {exitm} directive}{43}
\entry {expr (internal section)}{23}
\entry {expression arguments}{31}
\entry {expressions}{31}
\entry {expressions, empty}{31}
\entry {expressions, integer}{31}
\entry {\code {extend} directive M680x0}{95}
\entry {\code {extended} directive, i960}{88}
\entry {\code {extern} directive}{37}
\initial {F}
\entry {\code {fail} directive}{37}
\entry {faster processing (\code {-f})}{9}
\entry {fatal signal}{119}
\entry {\code {fepc} register, V850}{115}
\entry {\code {fepsw} register, V850}{115}
\entry {\code {ffloat} directive, VAX}{110}
\entry {\code {file} directive}{37}
\entry {\code {file} directive, AMD 29K}{56}
\entry {file name, logical}{37}
\entry {files, including}{40}
\entry {files, input}{7}
\entry {\code {fill} directive}{38}
\entry {filling memory}{48}
\entry {\code {float} directive}{38}
\entry {\code {float} directive, i386}{84}
\entry {\code {float} directive, M680x0}{95}
\entry {\code {float} directive, VAX}{110}
\entry {floating point numbers}{19}
\entry {floating point numbers (double)}{36}
\entry {floating point numbers (single)}{38, 48}
\entry {floating point, AMD 29K (\sc {ieee})}{55}
\entry {floating point, ARC (\sc {ieee})}{54}
\entry {floating point, ARM (\sc {ieee})}{58}
\entry {floating point, D10V}{64}
\entry {floating point, D30V}{68}
\entry {floating point, ESA/390 (\sc {ieee})}{79}
\entry {floating point, H8/300 (\sc {ieee})}{70}
\entry {floating point, H8/500 (\sc {ieee})}{73}
\entry {floating point, HPPA (\sc {ieee})}{74}
\entry {floating point, i386}{84}
\entry {floating point, i960 (\sc {ieee})}{88}
\entry {floating point, M680x0}{95}
\entry {floating point, SH (\sc {ieee})}{104}
\entry {floating point, SPARC (\sc {ieee})}{106}
\entry {floating point, V850 (\sc {ieee})}{116}
\entry {floating point, VAX}{110}
\entry {flonums}{19}
\entry {\code {force_thumb} directive, ARM}{58}
\entry {format of error messages}{8}
\entry {format of warning messages}{8}
\entry {formfeed (\code {{\tt\rawbackslashxx }f})}{18}
\entry {\code {func} directive}{38}
\entry {functions, in expressions}{31}
\initial {G}
\entry {\code {gbr960}, i960 postprocessor}{87}
\entry {\code {gfloat} directive, VAX}{110}
\entry {\code {global}}{108}
\entry {\code {global} directive}{38}
\entry {\code {gp} register, MIPS}{99}
\entry {\code {gp} register, V850}{114}
\entry {grouping data}{23}
\initial {H}
\entry {H8/300 addressing modes}{69}
\entry {H8/300 floating point (\sc {ieee})}{70}
\entry {H8/300 line comment character}{69}
\entry {H8/300 line separator}{69}
\entry {H8/300 machine directives (none)}{71}
\entry {H8/300 opcode summary}{71}
\entry {H8/300 options (none)}{69}
\entry {H8/300 registers}{69}
\entry {H8/300 size suffixes}{71}
\entry {H8/300 support}{69}
\entry {H8/300H, assembling for}{71}
\entry {H8/500 addressing modes}{72}
\entry {H8/500 floating point (\sc {ieee})}{73}
\entry {H8/500 line comment character}{72}
\entry {H8/500 line separator}{72}
\entry {H8/500 machine directives (none)}{73}
\entry {H8/500 opcode summary}{73}
\entry {H8/500 options (none)}{72}
\entry {H8/500 registers}{72}
\entry {H8/500 support}{72}
\entry {\code {half} directive, SPARC}{106}
\entry {hex character code (\code {{\tt\rawbackslashxx }\var {xd...}})}{18}
\entry {hexadecimal integers}{19}
\entry {\code {hfloat} directive, VAX}{110}
\entry {\code {hi} pseudo-op, V850}{117}
\entry {\code {hi0} pseudo-op, V850}{116}
\entry {\code {hidden} directive}{51}
\entry {\code {hilo} pseudo-op, V850}{117}
\entry {HPPA directives not supported}{75}
\entry {HPPA floating point (\sc {ieee})}{74}
\entry {HPPA Syntax}{74}
\entry {HPPA-only directives}{75}
\entry {\code {hword} directive}{38}
\initial {I}
\entry {i370 support}{78}
\entry {i386 16-bit code}{85}
\entry {i386 conversion instructions}{82}
\entry {i386 floating point}{84}
\entry {i386 immediate operands}{81}
\entry {i386 instruction naming}{81}
\entry {i386 instruction prefixes}{82}
\entry {i386 jump optimization}{84}
\entry {i386 jump, call, return}{81}
\entry {i386 jump/call operands}{81}
\entry {i386 memory references}{83}
\entry {i386 \code {mul}, \code {imul} instructions}{86}
\entry {i386 options (none)}{81}
\entry {i386 register operands}{81}
\entry {i386 registers}{82}
\entry {i386 sections}{81}
\entry {i386 size suffixes}{81}
\entry {i386 source, destination operands}{81}
\entry {i386 support}{81}
\entry {i386 syntax compatibility}{81}
\entry {i80306 support}{81}
\entry {i960 architecture options}{87}
\entry {i960 branch recording}{87}
\entry {i960 \code {callj} pseudo-opcode}{89}
\entry {i960 compare and jump expansions}{89}
\entry {i960 compare/branch instructions}{89}
\entry {i960 floating point (\sc {ieee})}{88}
\entry {i960 machine directives}{88}
\entry {i960 opcodes}{89}
\entry {i960 options}{87}
\entry {i960 support}{87}
\entry {\code {ident} directive}{39}
\entry {identifiers, AMD 29K}{55}
\entry {identifiers, ARM}{58}
\entry {\code {if} directive}{39}
\entry {\code {ifc} directive}{39}
\entry {\code {ifdef} directive}{39}
\entry {\code {ifeq} directive}{39}
\entry {\code {ifeqs} directive}{39}
\entry {\code {ifge} directive}{39}
\entry {\code {ifgt} directive}{39}
\entry {\code {ifle} directive}{39}
\entry {\code {iflt} directive}{39}
\entry {\code {ifnc} directive}{39}
\entry {\code {ifndef} directive}{39}
\entry {\code {ifne} directive}{40}
\entry {\code {ifnes} directive}{40}
\entry {\code {ifnotdef} directive}{39}
\entry {immediate character, ARM}{58}
\entry {immediate character, M680x0}{97}
\entry {immediate character, VAX}{112}
\entry {immediate operands, i386}{81}
\entry {\code {imul} instruction, i386}{86}
\entry {\code {include} directive}{40}
\entry {\code {include} directive search path}{10}
\entry {indirect character, VAX}{112}
\entry {infix operators}{32}
\entry {inhibiting interrupts, i386}{83}
\entry {input}{7}
\entry {input file linenumbers}{7}
\entry {instruction naming, i386}{81}
\entry {instruction prefixes, i386}{82}
\entry {instruction set, M680x0}{95}
\entry {instruction summary, D10V}{64}
\entry {instruction summary, D30V}{68}
\entry {instruction summary, H8/300}{71}
\entry {instruction summary, H8/500}{73}
\entry {instruction summary, SH}{104}
\entry {instruction summary, Z8000}{108}
\entry {instructions and directives}{17}
\entry {\code {int} directive}{40}
\entry {\code {int} directive, H8/300}{71}
\entry {\code {int} directive, H8/500}{73}
\entry {\code {int} directive, i386}{84}
\entry {integer expressions}{31}
\entry {integer, 16-byte}{44}
\entry {integer, 8-byte}{45}
\entry {integers}{19}
\entry {integers, 16-bit}{38}
\entry {integers, 32-bit}{40}
\entry {integers, binary}{19}
\entry {integers, decimal}{19}
\entry {integers, hexadecimal}{19}
\entry {integers, octal}{19}
\entry {integers, one byte}{34}
\entry {internal assembler sections}{23}
\entry {\code {internal} directive}{51}
\entry {invalid input}{119}
\entry {invocation summary}{1}
\entry {\code {irp} directive}{40}
\entry {\code {irpc} directive}{41}
\initial {J}
\entry {joining text and data sections}{12}
\entry {jump instructions, i386}{82}
\entry {jump optimization, i386}{84}
\entry {jump/call operands, i386}{81}
\initial {L}
\entry {label (\code {:})}{17}
\entry {labels}{27}
\entry {\code {lcomm} directive}{41}
\entry {\code {ld}}{8}
\entry {\code {ldouble} directive M680x0}{95}
\entry {\code {LDR reg,=<label>} pseudo op, ARM}{59}
\entry {\code {leafproc} directive, i960}{88}
\entry {length of symbols}{16}
\entry {\code {lflags} directive (ignored)}{41}
\entry {line comment character}{16}
\entry {line comment character, AMD 29K}{55}
\entry {line comment character, ARM}{58}
\entry {line comment character, D10V}{62}
\entry {line comment character, D30V}{66}
\entry {line comment character, H8/300}{69}
\entry {line comment character, H8/500}{72}
\entry {line comment character, M680x0}{97}
\entry {line comment character, SH}{103}
\entry {line comment character, V850}{113}
\entry {line comment character, Z8000}{107}
\entry {\code {line} directive}{41}
\entry {\code {line} directive, AMD 29K}{56}
\entry {line numbers, in input files}{7}
\entry {line numbers, in warnings/errors}{8}
\entry {line separator character}{16}
\entry {line separator, ARM}{58}
\entry {line separator, H8/300}{69}
\entry {line separator, H8/500}{72}
\entry {line separator, SH}{103}
\entry {line separator, Z8000}{107}
\entry {lines starting with \code {#}}{16}
\entry {linker}{8}
\entry {linker, and assembler}{21}
\entry {\code {linkonce} directive}{42}
\entry {\code {list} directive}{42}
\entry {listing control, turning off}{44}
\entry {listing control, turning on}{42}
\entry {listing control: new page}{36}
\entry {listing control: paper size}{45}
\entry {listing control: subtitle}{46}
\entry {listing control: title line}{51}
\entry {listings, enabling}{9}
\entry {little endian output, ARC}{3}
\entry {little endian output, MIPS}{5}
\entry {little endian output, PJ}{4}
\entry {little-endian output, ARC}{54}
\entry {little-endian output, MIPS}{98}
\entry {\code {ln} directive}{42}
\entry {\code {lo} pseudo-op, V850}{116}
\entry {local common symbols}{41}
\entry {local labels, retaining in output}{10}
\entry {local symbol names}{27}
\entry {location counter}{28}
\entry {location counter, advancing}{44}
\entry {logical file name}{37}
\entry {logical line number}{41}
\entry {logical line numbers}{16}
\entry {\code {long} directive}{42}
\entry {\code {long} directive, i386}{84}
\entry {\code {lp} register, V850}{115}
\entry {\code {lval}}{108}
\initial {M}
\entry {M680x0 addressing modes}{93}
\entry {M680x0 architecture options}{91}
\entry {M680x0 branch improvement}{95}
\entry {M680x0 directives}{95}
\entry {M680x0 floating point}{95}
\entry {M680x0 immediate character}{97}
\entry {M680x0 line comment character}{97}
\entry {M680x0 opcodes}{95}
\entry {M680x0 options}{91}
\entry {M680x0 pseudo-opcodes}{95}
\entry {M680x0 size modifiers}{93}
\entry {M680x0 support}{91}
\entry {M680x0 syntax}{93}
\entry {machine dependencies}{53}
\entry {machine directives, AMD 29K}{56}
\entry {machine directives, ARC}{54}
\entry {machine directives, ARM}{58}
\entry {machine directives, H8/300 (none)}{71}
\entry {machine directives, H8/500 (none)}{73}
\entry {machine directives, i960}{88}
\entry {machine directives, SH}{104}
\entry {machine directives, SPARC}{106}
\entry {machine directives, V850}{116}
\entry {machine directives, VAX}{110}
\entry {machine independent directives}{33}
\entry {machine instructions (not covered)}{6}
\entry {machine-independent syntax}{15}
\entry {\code {macro} directive}{43}
\entry {macros}{43}
\entry {Macros, AMD 29K}{55}
\entry {macros, count executed}{43}
\entry {make rules}{12}
\entry {manual, structure and purpose}{6}
\entry {memory references, i386}{83}
\entry {merging text and data sections}{12}
\entry {messages from assembler}{8}
\entry {minus, permitted arguments}{32}
\entry {MIPS architecture options}{98}
\entry {MIPS big-endian output}{98}
\entry {MIPS debugging directives}{100}
\entry {MIPS ECOFF sections}{99}
\entry {MIPS endianness}{5}
\entry {MIPS ISA}{5}
\entry {MIPS ISA override}{100}
\entry {MIPS little-endian output}{98}
\entry {MIPS option stack}{101}
\entry {MIPS processor}{98}
\entry {\sc {mit}}{93}
\entry {MMX, i386}{85}
\entry {mnemonic suffixes, i386}{81}
\entry {mnemonics for opcodes, VAX}{110}
\entry {mnemonics, D10V}{64}
\entry {mnemonics, D30V}{68}
\entry {mnemonics, H8/300}{71}
\entry {mnemonics, H8/500}{73}
\entry {mnemonics, SH}{104}
\entry {mnemonics, Z8000}{108}
\entry {Motorola syntax for the 680x0}{94}
\entry {MRI compatibility mode}{10}
\entry {\code {mri} directive}{42}
\entry {MRI mode, temporarily}{42}
\entry {\code {mul} instruction, i386}{86}
\initial {N}
\entry {\code {name}}{108}
\entry {named section}{46}
\entry {named sections}{22}
\entry {names, symbol}{27}
\entry {naming object file}{12}
\entry {new page, in listings}{36}
\entry {newline (\code {{\tt\rawbackslashxx }n})}{18}
\entry {newline, required at file end}{16}
\entry {\code {nolist} directive}{44}
\entry {\code {NOP} pseudo op, ARM}{59}
\entry {null-terminated strings}{34}
\entry {number constants}{18}
\entry {number of macros executed}{43}
\entry {numbered subsections}{23}
\entry {numbers, 16-bit}{38}
\entry {numeric values}{31}
\entry {\code {nword} directive, SPARC}{106}
\initial {O}
\entry {object file}{8}
\entry {object file format}{7}
\entry {object file name}{12}
\entry {object file, after errors}{13}
\entry {obsolescent directives}{52}
\entry {\code {octa} directive}{44}
\entry {octal character code (\code {{\tt\rawbackslashxx }\var {ddd}})}{18}
\entry {octal integers}{19}
\entry {\code {offset} directive, V850}{116}
\entry {opcode mnemonics, VAX}{110}
\entry {opcode summary, D10V}{64}
\entry {opcode summary, D30V}{68}
\entry {opcode summary, H8/300}{71}
\entry {opcode summary, H8/500}{73}
\entry {opcode summary, SH}{104}
\entry {opcode summary, Z8000}{108}
\entry {opcodes for AMD 29K}{56}
\entry {opcodes for ARM}{59}
\entry {opcodes for V850}{116}
\entry {opcodes, i960}{89}
\entry {opcodes, M680x0}{95}
\entry {operand delimiters, i386}{81}
\entry {operand notation, VAX}{112}
\entry {operands in expressions}{31}
\entry {operator precedence}{32}
\entry {operators, in expressions}{31}
\entry {operators, permitted arguments}{32}
\entry {optimization, D10V}{3}
\entry {optimization, D30V}{3}
\entry {option summary}{1}
\entry {options for AMD29K (none)}{55}
\entry {options for ARC}{54}
\entry {options for ARM (none)}{57}
\entry {options for i386 (none)}{81}
\entry {options for SPARC}{105}
\entry {options for V850 (none)}{113}
\entry {options for VAX/VMS}{109}
\entry {options, all versions of assembler}{9}
\entry {options, command line}{7}
\entry {options, D10V}{61}
\entry {options, D30V}{65}
\entry {options, H8/300 (none)}{69}
\entry {options, H8/500 (none)}{72}
\entry {options, i960}{87}
\entry {options, M680x0}{91}
\entry {options, PJ}{102}
\entry {options, SH (none)}{103}
\entry {options, Z8000}{107}
\entry {\code {org} directive}{44}
\entry {other attribute, of \code {a.out} symbol}{29}
\entry {output file}{8}
\initial {P}
\entry {\code {p2align} directive}{44}
\entry {\code {p2alignl} directive}{45}
\entry {\code {p2alignw} directive}{45}
\entry {padding the location counter}{33}
\entry {padding the location counter given a power of two}{44}
\entry {padding the location counter given number of bytes}{34}
\entry {page, in listings}{36}
\entry {paper size, for listings}{45}
\entry {paths for \code {.include}}{10}
\entry {patterns, writing in memory}{38}
\entry {PIC code generation for ARM}{57}
\entry {PJ endianness}{4}
\entry {PJ options}{102}
\entry {PJ support}{102}
\entry {plus, permitted arguments}{32}
\entry {precedence of operators}{32}
\entry {precision, floating point}{19}
\entry {prefix operators}{32}
\entry {prefixes, i386}{82}
\entry {preprocessing}{15}
\entry {preprocessing, turning on and off}{15}
\entry {primary attributes, COFF symbols}{29}
\entry {\code {print} directive}{45}
\entry {\code {proc} directive, SPARC}{106}
\entry {\code {protected} directive}{51}
\entry {protected registers, AMD 29K}{55}
\entry {pseudo-opcodes, M680x0}{95}
\entry {pseudo-ops for branch, VAX}{111}
\entry {pseudo-ops, machine independent}{33}
\entry {\code {psize} directive}{45}
\entry {\code {psw} register, V850}{115}
\entry {\code {purgem} directive}{45}
\entry {purpose of \sc {gnu} assembler}{6}
\initial {Q}
\entry {\code {quad} directive}{45}
\entry {\code {quad} directive, i386}{84}
\initial {R}
\entry {real-mode code, i386}{85}
\entry {\code {register} directive, SPARC}{106}
\entry {register names, AMD 29K}{55}
\entry {register names, ARM}{58}
\entry {register names, H8/300}{69}
\entry {register names, V850}{114}
\entry {register names, VAX}{112}
\entry {register operands, i386}{81}
\entry {registers, D10V}{62}
\entry {registers, D30V}{67}
\entry {registers, H8/500}{72}
\entry {registers, i386}{82}
\entry {registers, SH}{103}
\entry {registers, Z8000}{107}
\entry {relocation}{21}
\entry {relocation example}{23}
\entry {repeat prefixes, i386}{83}
\entry {reporting bugs in assembler}{119}
\entry {\code {rept} directive}{46}
\entry {\code {req} directive, ARM}{58}
\entry {\code {reserve} directive, SPARC}{106}
\entry {return instructions, i386}{81}
\entry {\code {rsect}}{108}
\initial {S}
\entry {\code {sbttl} directive}{46}
\entry {\code {scl} directive}{46}
\entry {\code {sdaoff} pseudo-op, V850}{117}
\entry {search path for \code {.include}}{10}
\entry {\code {sect} directive, AMD 29K}{56}
\entry {\code {section} directive}{46}
\entry {\code {section} directive, V850}{116}
\entry {section override prefixes, i386}{82}
\entry {section-relative addressing}{22}
\entry {sections}{21}
\entry {sections in messages, internal}{23}
\entry {sections, i386}{81}
\entry {sections, named}{22}
\entry {\code {seg} directive, SPARC}{106}
\entry {\code {segm}}{108}
\entry {\code {set} directive}{47}
\entry {SH addressing modes}{103}
\entry {SH floating point (\sc {ieee})}{104}
\entry {SH line comment character}{103}
\entry {SH line separator}{103}
\entry {SH machine directives}{104}
\entry {SH opcode summary}{104}
\entry {SH options (none)}{103}
\entry {SH registers}{103}
\entry {SH support}{103}
\entry {\code {short} directive}{48}
\entry {SIMD, i386}{85}
\entry {single character constant}{18}
\entry {\code {single} directive}{48}
\entry {\code {single} directive, i386}{84}
\entry {sixteen bit integers}{38}
\entry {sixteen byte integer}{44}
\entry {\code {size} directive}{48}
\entry {size modifiers, D10V}{61}
\entry {size modifiers, D30V}{65}
\entry {size modifiers, M680x0}{93}
\entry {size prefixes, i386}{83}
\entry {size suffixes, H8/300}{71}
\entry {sizes operands, i386}{81}
\entry {\code {skip} directive}{48}
\entry {\code {skip} directive, M680x0}{95}
\entry {\code {skip} directive, SPARC}{106}
\entry {\code {sleb128} directive}{48}
\entry {small objects, MIPS ECOFF}{99}
\entry {SOM symbol attributes}{29}
\entry {source program}{7}
\entry {source, destination operands; i386}{81}
\entry {\code {sp} register, V850}{114}
\entry {\code {space} directive}{48}
\entry {space used, maximum for assembly}{13}
\entry {SPARC architectures}{105}
\entry {SPARC data alignment}{105}
\entry {SPARC floating point (\sc {ieee})}{106}
\entry {SPARC machine directives}{106}
\entry {SPARC options}{105}
\entry {SPARC support}{105}
\entry {special characters, M680x0}{97}
\entry {special purpose registers, AMD 29K}{55}
\entry {\code {stabd} directive}{49}
\entry {\code {stabn} directive}{49}
\entry {\code {stabs} directive}{49}
\entry {\code {stab\var {x}} directives}{49}
\entry {standard assembler sections}{21}
\entry {standard input, as input file}{7}
\entry {statement separator character}{16}
\entry {statement separator, ARM}{58}
\entry {statement separator, H8/300}{69}
\entry {statement separator, H8/500}{72}
\entry {statement separator, SH}{103}
\entry {statement separator, Z8000}{107}
\entry {statements, structure of}{16}
\entry {statistics, about assembly}{13}
\entry {stopping the assembly}{33}
\entry {string constants}{17}
\entry {\code {string} directive}{49}
\entry {\code {string} directive on HPPA}{76}
\entry {string literals}{34}
\entry {string, copying to object file}{49}
\entry {\code {struct} directive}{50}
\entry {structure debugging, COFF}{50}
\entry {sub-instruction ordering, D10V}{62}
\entry {sub-instruction ordering, D30V}{66}
\entry {sub-instructions, D10V}{61}
\entry {sub-instructions, D30V}{65}
\entry {subexpressions}{31}
\entry {subtitles for listings}{46}
\entry {subtraction, permitted arguments}{32}
\entry {summary of options}{1}
\entry {support}{74}
\entry {supporting files, including}{40}
\entry {suppressing warnings}{13}
\entry {\code {sval}}{108}
\entry {symbol attributes}{28}
\entry {symbol attributes, \code {a.out}}{29}
\entry {symbol attributes, COFF}{29}
\entry {symbol attributes, SOM}{29}
\entry {symbol descriptor, COFF}{35}
\entry {symbol names}{27}
\entry {symbol names, \samp {$} in}{62, 66, 72, 103}
\entry {symbol names, local}{27}
\entry {symbol names, temporary}{27}
\entry {symbol storage class (COFF)}{46}
\entry {symbol type}{29}
\entry {symbol type, COFF}{51}
\entry {symbol value}{28}
\entry {symbol value, setting}{47}
\entry {symbol values, assigning}{27}
\entry {symbol versioning}{50}
\entry {symbol visibility}{51}
\entry {symbol, common}{35}
\entry {symbol, making visible to linker}{38}
\entry {symbolic debuggers, information for}{49}
\entry {symbols}{27}
\entry {symbols with uppercase, VAX/VMS}{109}
\entry {symbols, assigning values to}{36}
\entry {symbols, local common}{41}
\entry {\code {symver} directive}{50}
\entry {syntax compatibility, i386}{81}
\entry {syntax, D10V}{61}
\entry {syntax, D30V}{65}
\entry {syntax, M680x0}{93}
\entry {syntax, machine-independent}{15}
\entry {\code {sysproc} directive, i960}{89}
\initial {T}
\entry {tab (\code {{\tt\rawbackslashxx }t})}{18}
\entry {\code {tag} directive}{50}
\entry {\code {tdaoff} pseudo-op, V850}{117}
\entry {temporary symbol names}{27}
\entry {text and data sections, joining}{12}
\entry {\code {text} directive}{51}
\entry {text section}{22}
\entry {\code {tfloat} directive, i386}{84}
\entry {\code {thumb} directive, ARM}{58}
\entry {Thumb support}{57}
\entry {\code {thumb_func} directive, ARM}{58}
\entry {\code {thumb_set} directive, ARM}{59}
\entry {time, total for assembly}{13}
\entry {\code {title} directive}{51}
\entry {\code {tp} register, V850}{114}
\entry {trusted compiler}{9}
\entry {turning preprocessing on and off}{15}
\entry {\code {type} directive}{51}
\entry {type of a symbol}{29}
\initial {U}
\entry {\code {ualong} directive, SH}{104}
\entry {\code {uaword} directive, SH}{104}
\entry {\code {uleb128} directive}{51}
\entry {undefined section}{23}
\entry {\code {unsegm}}{108}
\entry {\code {use} directive, AMD 29K}{56}
\initial {V}
\entry {V850 command line options}{113}
\entry {V850 floating point (\sc {ieee})}{116}
\entry {V850 line comment character}{113}
\entry {V850 machine directives}{116}
\entry {V850 opcodes}{116}
\entry {V850 options (none)}{113}
\entry {V850 register names}{114}
\entry {V850 support}{113}
\entry {\code {val} directive}{51}
\entry {value attribute, COFF}{51}
\entry {value of a symbol}{28}
\entry {VAX bitfields not supported}{113}
\entry {VAX branch improvement}{111}
\entry {VAX command-line options ignored}{109}
\entry {VAX displacement sizing character}{112}
\entry {VAX floating point}{110}
\entry {VAX immediate character}{112}
\entry {VAX indirect character}{112}
\entry {VAX machine directives}{110}
\entry {VAX opcode mnemonics}{110}
\entry {VAX operand notation}{112}
\entry {VAX register names}{112}
\entry {VAX support}{109}
\entry {Vax-11 C compatibility}{109}
\entry {VAX/VMS options}{109}
\entry {version of assembler}{13}
\entry {versions of symbols}{50}
\entry {VMS (VAX) options}{109}
\initial {W}
\entry {warning for altered difference tables}{10}
\entry {warning messages}{8}
\entry {warnings, causing error}{13}
\entry {warnings, suppressing}{13}
\entry {warnings, switching on}{13}
\entry {whitespace}{15}
\entry {whitespace, removed by preprocessor}{15}
\entry {wide floating point directives, VAX}{110}
\entry {\code {word} directive}{52}
\entry {\code {word} directive, H8/300}{71}
\entry {\code {word} directive, H8/500}{73}
\entry {\code {word} directive, i386}{84}
\entry {\code {word} directive, SPARC}{106}
\entry {writing patterns in memory}{38}
\entry {\code {wval}}{108}
\initial {X}
\entry {\code {xword} directive, SPARC}{106}
\initial {Z}
\entry {Z800 addressing modes}{107}
\entry {Z8000 directives}{108}
\entry {Z8000 line comment character}{107}
\entry {Z8000 line separator}{107}
\entry {Z8000 opcode summary}{108}
\entry {Z8000 options}{107}
\entry {Z8000 registers}{107}
\entry {Z8000 support}{107}
\entry {\code {zdaoff} pseudo-op, V850}{118}
\entry {\code {zero} register, V850}{114}
\entry {zero-terminated strings}{34}
